In a manufacturing process of a semiconductor device, some of multiple regions formed of different semiconductor materials are selectively etched (see, for example, Patent Documents 1 and 2).
Patent Document 1 describes a method of plasma etching an etching target layer of a target object with a patterning mask of the target object. In this method, an etching process is carried out by cyclically switching an ON-state and an OFF-state of plasma power from each other and applying pulsed-bias power, which is synchronized with a cycle of the plasma power, to a mounting table. When the plasma power is in the ON-state and the bias power is in the ON-state, a reaction region is etched and reaction by-products are formed in the reaction region. When the plasma power is in the OFF-state and the bias power is in the OFF-state, the reaction by-products are removed from the reaction region. Thus, an etching rate becomes uniform regardless of a density of a device structure. Further, in Patent Document 1, it is described that if a single cycle is comprised of a successive ON-state and a successive OFF-state, a ratio of the ON-state to the single cycle may be in a range of 5% to 95% or 65% to 75%.
Furthermore, Patent Document 1 describes a method of combining a process of etching by continuously supplying plasma power with a process of etching by supplying pulsed-plasma power and pulsed-bias power. It is described that in the process of etching by continuously supplying plasma power, electron cyclotron resonance plasma, helicon wave plasma, inductively coupled plasma, or surface wave plasma is used as a plasma source.
Patent Document 2 describes a method of plasma etching an etching target layer of a target object with a patterning mask of the target object. It is described that microwave plasma is used as a plasma source and plasma damage to the target object is suppressed by performing a process with plasma under a relatively low electron temperature and a relatively high electron density.
In the method of Patent Document 2, bias power to be supplied to the target object via a mounting table is intermittently supplied by repeating a supply and a stop of the supply of the bias power. Further, Patent Document 2 describes conditions of a frequency and a duty ratio of the bias power intermittently to be supplied. Herein, assuming that a sum of a supply time of AC bias power and a stop time thereof is a total time, the duty ratio refers to a ratio of the supply time to the total time. In Patent Document 2, it is described that since the duty ratio is set to be higher than 0.5 and lower than 1, it is possible to accurately etch the target object into a desired shape. To be specific, it is described that since a thickness and a hardness of a protective film (reaction by-products) formed on a mask layer are higher than those of a protective film (by-products) formed on a bottom wall of a groove, it is possible to vertically etch the target object. Further, it is described that since the frequency of the bias power is in a range of 10 Hz to 30 Hz, an etching rate can be more uniform regardless of a width of a gap between masks.    Patent Document 1: Specification of U.S. Pat. No. 7,718,538    Patent Document 2: Japanese Patent Laid-open Publication No. 2012-084872
However, a conventional etching method needs to be improved in order to achieve miniaturization accompanied with reduction in size of semiconductor devices. By way of example, in a recently employed fin-type field effect transistor, a gate material formed between protruding fins needs to be etched with a mask formed on the fin. Since the fin has a very fine structure, it is required to further improve etching accuracy as well as secure selectivity.